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Manufacturer's description: AL321 - USB JTAG programmer for Xilinx FPGA and CPLD systems
The ALINX AL321 programmer enables configuration transfer, diagnostics, and testing of projects using Xilinx FPGA and CPLD devices. The device connects a computer to the development board's JTAG interface, and two types of connectors facilitate interoperability with various hardware platforms. Automatic adjustment to the target device's interface voltage reduces the need for manual configuration of logic levels. LED indicators provide information about the programmer's operating status, while SPI Flash PROM support allows for saving configurations intended for power-on. The manufacturer declares compatibility with ISE versions 12.1 to 14.7 and with Vivado versions available at the time of product release.
Main features of the Xilinx programmer
- USB JTAG interface: allows you to configure and debug FPGAs and SoCs from your computer
- Two JTAG connectors: a 10-pin port with a 2.54 mm pitch and a 14-pin port with a 2 mm pitch increase compatibility with development boards
- Automatic voltage recognition: the programmer adjusts the interface level to the target system voltage
- Supported Logic Levels: 1.5V, 1.8V, 2.5V, and 3.3V LVCMOS compatible
- Xilinx Software Compatibility: Support for ISE, Vivado, iMPACT, and ChipScope
- Windows and Linux support: ability to work on popular operating systems
- SPI Flash PROM Memory Programming: allows you to save configurations for automatic system startup.
- LED indication: indicators make it easy to monitor the operating and transmission status
- Broad hardware compatibility: Supports multiple Xilinx FPGA, CPLD, and configuration memory families
- Laboratory and design applications: useful for learning, prototyping, commissioning, and servicing digital devices
Applications of the USB JTAG programmer
- Configuring Xilinx FPGAs on Development Boards
- CPLD programming
- Saving configuration to SPI Flash PROM memories
- Debugging FPGA designs in the ChipScope environment
- Testing projects created in ISE and Vivado
- Running prototypes using SoCs and FPGAs
- Diagnostics of the JTAG interface and device chains
- Updating the configuration of digital devices
- Construction of laboratory stations for FPGA learning
- Servicing and testing of electronic boards
Technical specifications of the ALINX AL321
- Intended use: Xilinx FPGAs, SoCs, CPLDs and configuration memories
- PC-side interface: USB
- Target system interface: JTAG
- JTAG 1 connector: 10-pin
- JTAG 1 connector pitch: 2.54 mm
- JTAG 2 connector: 14-pin
- JTAG 2 connector pitch: 2 mm
- Supported interface voltages: 1.5 V, 1.8 V, 2.5 V and 3.3 V
- 3.3V level standard: LVCMOS
- Target system voltage recognition: automatic
- Supported operating systems: Windows, Linux
- Supported ISE: 12.1 to 14.7
- Supported Vivado environment: the manufacturer declares support for versions available at the time of publication of product data
- Supported tools: iMPACT, ChipScope
- SPI Flash PROM Memory Programming: Yes
- Status indication: LEDs
- Declared Conformity: Xilinx Devices
- Supported FPGAs: Spartan family, including Spartan-6 devices
- Supported CPLDs: XC9500, XC9500XL, XC9500XV, CoolRunner XPLA3, and CoolRunner-II
- Supported ISP PROMs: XC18V00 series
- Supported Platform Flash Memory: XCF00S, XCF00P, and XL PROM series
- Other supported FPGAs: XC4000 series
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